所有图书
The Verilog PLI Handbook: A Users Guide and Comprehensive Reference on the Verilog Programming Language Interface
View more
The Verilog PLI Handbook: A Users Guide and Comprehensive Reference on the Verilog Programming Language Interface
Deepak Kumar Tala Verilog Tutorial (2003)(en)(123s)
View more
Deepak Kumar Tala Verilog Tutorial (2003)(en)(123s)
Verilog HDL 硬件描述语言 第二版 - J. Bhasker 著 徐振林 等译
View more
Verilog HDL 硬件描述语言 第二版 - J. Bhasker 著 徐振林 等译
System Verilog验证 测试平台编写指南（第二版）
View more
System Verilog验证 测试平台编写指南（第二版）
Verilog Digital Design Synthesis
View more
Verilog Digital Design Synthesis
Verilog Quickstart: A Practical Guide to Simulation and Synthesis in Verilog
View more
Verilog Quickstart: A Practical Guide to Simulation and Synthesis in Verilog
Verilog Quickstart: A Practical Guide to Simulation and Synthesis in Verilog, 2nd Edition (The International Series in Engineering and Computer Science)
View more
Verilog Quickstart: A Practical Guide to Simulation and Synthesis in Verilog, 2nd Edition (The International Series in Engineering and Computer Science)
FPGA Prototyping By Verilog Examples: Xilinx Spartan-3 Version
View more
FPGA Prototyping By Verilog Examples: Xilinx Spartan-3 Version
数字逻辑基础与Verilog设计
View more
数字逻辑基础与Verilog设计
Verilog and SystemVerilog Gotchas: 101 Common Coding Errors and How to Avoid Them
View more
Verilog and SystemVerilog Gotchas: 101 Common Coding Errors and How to Avoid Them
Verilog Digital System Design
View more
Verilog Digital System Design
IEEE Std 1364-2001: Verilog Hardware Description Language
View more
IEEE Std 1364-2001: Verilog Hardware Description Language
Verilog HDL Synthesis A Practical Primer
View more
Verilog HDL Synthesis A Practical Primer
Sunsoft Press Verilog HDL A Guide to Digital Design and Synthesis
View more
Sunsoft Press Verilog HDL A Guide to Digital Design and Synthesis
Verilog HDL 数字设计与综合 第二版 - Samir Palnitkar 著 夏宇闻 等译
View more
Verilog HDL 数字设计与综合 第二版 - Samir Palnitkar 著 夏宇闻 等译
Verilog编程艺术
View more
Verilog编程艺术
1364.1-2002 IEEE Standard for Verilog Register Transfer Level Synthesis
View more
1364.1-2002 IEEE Standard for Verilog Register Transfer Level Synthesis
FPGA Prototyping by Verilog Examples: Xilinx SpartanTM-3V ersion - Pong P. Chu
View more
FPGA Prototyping by Verilog Examples: Xilinx SpartanTM-3V ersion - Pong P. Chu